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this is information on a product in full production. october 2013 docid025424 rev 1 1/15 15 STL30N10F7 n-channel 100 v, 0.027 typ., 8 a, stripfet? vii deepgate? power mosfet in a powerflat? 5x6 package datasheet - production data figure 1. internal schematic diagram features ? ultra low on-resistance ? 100% avalanche tested applications ? switching applications description this device is an n-channel power mosfet developed using the 7 th generation of stripfet? deepgate? technology, with a new gate structure. the resulting power mosfet exhibits the lowest r ds(on) in all packages. powerflat? 5x6 1 2 3 4 $0y ' * 6 order code v ds r ds(on) max. i d p tot STL30N10F7 100 v 0.035 8 a 4.8 w (1) 1. the value is rated according to r thj-pcb . table 1. device summary order code marking package packaging STL30N10F7 30n10f7 powerflat? 5x6 tape and reel www.st.com
contents STL30N10F7 2/15 docid025424 rev 1 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
docid025424 rev 1 3/15 STL30N10F7 electrical ratings 1 electrical ratings . table 2. absolute maximum ratings symbol parameter value unit v ds drain-source voltage 100 v v gs gate-source voltage 20 v i d (1) 1. this value is rated according to r thj-c . drain current (continuous) at t c = 25 c 30 a i d (1) drain current (continuous) at t c = 100 c 18.2 a i d (1)(3) drain current (pulsed) 120 a i d (2) 2. this value is rated according to r thj-pcb . drain current (continuous) at t pcb = 25 c 8 a i d (2) drain current (continuous) at t pcb =100 c 5.2 a i dm (2)(3) 3. pulse width limited by safe operating area. drain current (pulsed) 32 a p tot (1) total dissipation at t c = 25 c 75 w p tot (2) total dissipation at t pcb = 25 c 4.8 w t j t stg operating junction temperature storage temperature -55 to 175 c table 3. thermal data symbol parameter value unit r thj-case thermal resistance junction-case max. 2 c/w r thj-pcb (1) 1. when mounted on fr-4 board of 1 inch2, 2oz cu, t < 10 sec. thermal resistance junction-pcb 31.3 c/w
electrical characteristics STL30N10F7 4/15 docid025424 rev 1 2 electrical characteristics (t c = 25 c unless otherwise specified) table 4. on /off states symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage v gs = 0, i d = 250 a 100 v i dss zero gate voltage drain current v gs = 0, v ds = 100 v 10 a v gs = 0, v ds = 100 v, t c = 125 c 100 a i gss gate-body leakage current v ds = 0, v gs = + 20 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 2.5 4.5 v r ds(on) static drain-source on- resistance v gs = 10 v, i d = 4 a 0.027 0.035 table 5. dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v ds = 50 v, f = 1 mhz, v gs = 0 - 920 - pf c oss output capacitance - 215 - pf c rss reverse transfer capacitance -19-pf q g total gate charge v dd = 50 v, i d = 8 a, v gs = 10 v (see figure 14 ) -14-nc q gs gate-source charge - 7 - nc q gd gate-drain charge - 3 - nc table 6. switching times symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd = 50 v, i d = 4 a, r g = 4.7 , v gs = 10 v (see figure 13 ) -9.8-ns t r rise time - 14 - ns t d(off) turn-off delay time - 14.8 - ns t f fall time - 4.6 - ns
docid025424 rev 1 5/15 STL30N10F7 electrical characteristics table 7. source-drain diode symbol parameter test conditions min. typ. max. unit i sd source-drain current - 8 a i sdm (1) 1. pulse width limited by safe operating area. source-drain current (pulsed) - 32 a v sd (2) 2. pulsed: pulse duration = 300 s, duty cycle 1.5%. forward on voltage i sd = 8 a, v gs = 0 - 1.1 v t rr reverse recovery time i sd = 8 a, di/dt = 100 a/s v dd = 80 v, t j = 150 c -38 ns q rr reverse recovery charge - 29 nc i rrm reverse recovery current - 1.7 a
electrical characteristics STL30N10F7 6/15 docid025424 rev 1 2.1 electrical characteristics (curves) figure 2. safe operating area figure 3. thermal impedance figure 4. output characteristics figure 5. transfer characteristics figure 6. gate charge vs gate-source voltage figure 7. static drain-source on-resistance i d 10 1 0.1 0.1 1 v ds (v) 10 (a) operation in this area is limited by max r ds(on) 100s 1ms 10ms 0.01 tj=175c tc=25c single pulse 10 0 gipd300913lm single pulse = 0.5 0.05 0.02 0.01 0.2 0.1 k 10 t p (s) -4 10 -3 10 -2 10 -5 10 -3 10 -2 10 -1 10 -1 10 0 gipd091013900lm i d 5 3 10 0 0 v ds (v) (a) 7 8 5v 6v v gs =10v 2 4 6 5 7v 8v 9v 0 0 0 0 0 0 0 gipd3009131240lm i d 6 4 2 0 4 v gs (v) 8 (a) 2 6 10 8 10 3 5 7 v ds =6v 3 5 7 9 11 0 0 0 0 0 0 0 gipd3009131300lm v gs 6 4 2 0 0 5 q g (nc) (v) 8 10 v dd =50v i d =25a 15 12 10 gipd3009131325lm r ds(on) 20 2 10 i d (a) (m ) 4 12 v gs =10v 14 32 28 26 24 22 6 8 30 gipd0910131008lm
docid025424 rev 1 7/15 STL30N10F7 electrical characteristics figure 8. capacitance variations figure 9. normalized gate threshold voltage vs temperature figure 10. normalized on-resistance vs temperature figure 11. source-drain diode forward characteristics figure 12. normalized v (br)dss vs temperature c 1000 200 0 0 v ds (v) (pf) 10 ciss coss crss 20 30 40 50 60 70 80 90 400 600 800 gipd0110131015lm v gs(th) 0.6 0.5 0.4 -55 -5 t j (c) (norm) -30 1 70 20 45 95 i d =250a 120 145 0.7 0.8 0.9 1.1 gipd0110131125lm r ds(on) 1 0.5 0 -55 -5 t j (c) ( norm ) 20 1.5 id=4 a vgs=10 v 2 -30 45 70 95 120 145 gipd011013945lm v sd 2 10 i sd (a) (v) 4 12 0.5 0.6 0.7 0.8 t j =-55c t j =150c t j =25c 1 0.9 6 8 14 gipd0110131224lm v( br)dss -55 -5 t j (c) (norm) -30 70 20 45 95 0.96 0.98 1 1.02 1.04 i d =1ma 120 145 gipd0110131250lm
test circuits STL30N10F7 8/15 docid025424 rev 1 3 test circuits figure 13. switching times test circuit for resistive load figure 14. gate charge test circuit figure 15. test circuit for inductive load switching and diode recovery times figure 16. unclamped inductive load test circuit figure 17. unclamped inductive waveform figure 18. switching time waveform am01468v1 v gs p w v d r g r l d.u.t. 2200 f 3.3 f v dd am01469v1 v dd 47k 1k 47k 2.7k 1k 12v v i =20v=v gmax 2200 f p w i g =const 100 100nf d.u.t. v g am01470v1 a d d.u.t. s b g 25 a a b b r g g fast diode d s l=100 h f 3.3 1000 f v dd am01471v1 v i p w v d i d d.u.t. l 2200 f 3.3 f v dd am01472v1 v (br)dss v dd v dd v d i dm i d am01473v1 v ds t on td on td off t off t f t r 90% 10% 10% 0 0 90% 90% 10% v gs
docid025424 rev 1 9/15 STL30N10F7 package mechanical data 4 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. table 8. powerflat 5x6 type s-r mechanical data dim. mm min. typ. max. a0.80 1.00 a1 0.02 0.05 a2 0.25 b0.30 0.50 d5.005.205.40 e5.956.156.35 d2 4.11 4.31 e2 3.50 3.70 e1.27 l0.60 0.80 k 1.275 1.575
package mechanical data STL30N10F7 10/15 docid025424 rev 1 figure 19. powerflat 5x6 type s-r drawings 8231817_rev.g_ribbon type s-r 5 8 4 1 pin 1 identification 1 4 5 8 pin 1 identification . bottom view side view top view
docid025424 rev 1 11/15 STL30N10F7 package mechanical data figure 20. powerflat 5x6 type s-r recommended footprint (dimensions in mm) footprint
packaging mechanical data STL30N10F7 12/15 docid025424 rev 1 5 packaging mechanical data figure 21. powerflat? 5x6 tape (a) figure 22. powerflat? 5x6 package orientation in carrier tape a. all dimensions are in millimeters. measured from centerline of sprocket hole to centerline of pocket. cumulative tolerance of 10 sprocket holes is 0.20 . measured from centerline of sprocket hole to centerline of pocket. (i) (ii) (iii) 2 2.00.1 (i) bo (5.300.1) ko (1.200.1) 0.05) ?1.5 min. ?1.550.05 p ao(6.300.1) f(5.500.1)(iii) w(12.000.3) 1.750.1 4.00.1 (ii) p 0 y y section y-y c l p1(8.000.1) do d1 e 1 (0.30 t ref.r0.50 ref 0.20 base and bulk quantity 3000 pcs 8234350_tape_rev_c pin 1 identification
docid025424 rev 1 13/15 STL30N10F7 packaging mechanical data figure 23. powerflat? 5x6 reel 2.20 ?21.2 13.00 core detail 2.50 1.90 r0.60 77 128 ?a r1.10 2.50 4.00 r25.00 part no. w1 w2 18.4 (max) w3 06 ps esd logo at t e n t i o n observe precautions for handling electrostatic sensitive devices 11.9/15.4 12.4 (+2/-0) a 330 (+0/-4.0) all dimensions are in millimeters ?n 178(2.0) 8234350_reel_rev_c
revision history STL30N10F7 14/15 docid025424 rev 1 6 revision history table 9. document revision history date revision changes 22-oct-2013 1 first release.
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